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7: 12-Channel Correlator
50 GP4020 GPS Baseband Processor Design Manual
TIMEBASE
GENERATOR
MEAS_INT
ACCUM_INT
CLOCK
GENERATOR
SAMPLE LATCH
SIGN0 /
MAG0
SIGN1 /
MAG1
SAMPCLK
M_CLK
(from SCG)
TRACKING
MODULE 0
TRACKING
MODULE 1
TRACKING
MODULE 2
TRACKING
MODULE 3
TRACKING
MODULE 11
TIC
MULTI-PHASE CLOCKS
MULTI-PHASE CLOCKS
MULTI-PHASE CLOCKS
MULTI-PHASE CLOCKS
MULTI-PHASE CLOCKS
LATCHED
SIGN0 &
MAG0
STATUS
REGISTERS
DATA BUS
INTERFACE
32 BIT BUS
SYSTEM
STATUS BITS
ADDRESS
DECODER
D<15:0>
A<9:2>
CONTROL
TIC
RAW
TIMEMARK
GENERATOR
RAW
TIMEMARK
RELOAD TIC
CLK100KHz
UIM INTERFACE
UIM BUS
(To / from Firefly MF1)
LATCHED
SIGN1 &
MAG1
TIC
TIC
TIC
TIC
TIC
TIC
To / From
RF Front End
To Firefly
INTC & PCL
To 1PPS
Timemark
Generator
REGISTER
SELECTS
Figure 7.1 12-Channel Correlator Block Diagram