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13: Real Time Clock
134 GP4020 GPS Baseband Processor Design Manual
Bit
No.
Mnemonic Description Reset
Value
R/W
15:8 RTC_SEC_T[7:0] 8 MSBs of accumulated RTC seconds since last 24-bit counter reset.
Most Significant Bit = Bit 15
Note: This data ONLY reset by writing ‘0’ to bit 0 of RTC_PRE. NOT
resettable by any other reset source.
0x00 R
7:0 COMP_RTCS[7:0] 8-bit RTC Counter Comparison Value.
Most Significant Bit = Bit 7.
0xFF R/W
Table 13.5 RTC COMP_RTCS Register