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17: UARTs
GP4020 GPS Baseband Processor Design Manual 173
Baud Rate
Required
Division
Select
Value
Reference
Clock (MHz)
Baud Rate
Ratio
Prog.
BRR
Value
Programmed
Baud Rate
Baud Rate
Error (%)
1200 8 3.59375 186.17448 186 1201.12 -0.093
2400 4 7.1875 186.17448 186 2402.239 -0.093
4800 2 14.375 186.17448 186 4804.479 -0.093
9600 1 28.75 186.17448 186 9608.957 -0.093
19200 1 28.75 92.58724 93 19115.69 0.439
38400 1 28.75 45.79362 46 38231.38 0.439
57600 1 28.75 30.195747 30 57963.71 -0.631
76800 1 28.75 22.39681 22 78125 -1.725
115200 1 28.75 14.597873 15 112304.7 2.513
Table 17.8 UART baud-rate settings with UART_CLK (BµILD_CLK) frequency = 28.75MHz
Baud Rate
Required
Division
Select
Value
Reference
Clock (MHz)
Baud Rate
Ratio
Prog.
BRR
Value
Programmed
Baud Rate
Baud Rate
Error (%)
1200 8 3.75 194.3125 194 1201.923 -0.16
2400 4 7.5 194.3125 194 2403.846 -0.16
4800 2 15 194.3125 194 4807.692 -0.16
9600 1 30 194.3125 194 9615.385 -0.16
19200 1 30 96.65625 97 19132.65 0.351
38400 1 30 47.828125 48 38265.31 0.351
57600 1 30 31.552083 32 56818.18 1.357
76800 1 30 23.414063 23 78125 -1.725
115200 1 30 15.276042 15 117187.5 -1.725
Table 17.9 UART baud-rate settings with UART_CLK (BµILD_CLK) frequency = 30MHz
Note: The data supplied in Table 17.10 and Table 17.11 below is provided for information only. Operating the
GP4020 UART_CLK at a frequency above 30MHz is NOT recommended for normal operation.
Baud Rate
Required
Division
Select
Value
Reference
Clock (MHz)
Baud Rate
Ratio
Prog.
BRR
Value
Programmed
Baud Rate
Baud Rate
Error (%)
1200 8 4.0625 210.58854 211 1197.671 0.194
2400 4 8.125 210.58854 211 2395.342 0.194
4800 2 16.25 210.58854 211 4790.684 0.194
9600 1 32.5 210.58854 211 9581.368 0.194
19200 1 32.5 104.79427 105 19162.74 0.194
38400 1 32.5 51.897135 52 38325.47 0.194
57600 1 32.5 34.264757 34 58035.71 -0.756
76800 1 32.5 25.448568 25 78125 -1.725
115200 1 32.5 16.632378 17 112847.2 2.042
Table 17.10 UART baud-rate settings with UART_CLK (BµILD_CLK) frequency = 32.5MHz