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GP4020 GPS Baseband Processor Design Manual iii
Contents
Page
Contents.........................................................................................................................................iii
Related Products and Documents.................................................................................................... v
Trademarks .................................................................................................................................... v
Document References.................................................................................................................... vi
Document Conventions.................................................................................................................. vi
1 INTRODUCTION ...............................................................................................................1
1.1 GP4020 GPS Baseband Processor Overview........................................................................1
1.2 Features...............................................................................................................................1
1.3 Functional Description...........................................................................................................2
1.4 Typical Application................................................................................................................8
2 GP4020 PACKAGE AND ELECTRICAL CONNECTIONS...............................................11
2.1 GP4020 100-pin Package Dimensions ................................................................................11
2.2 GP4020 100-pin Package Electrical Connection Details....................................................... 13
3 ARM7TDMI MICROPROCESSOR...................................................................................19
3.1 ARM7TDMI Instruction Set Architecture...............................................................................19
3.2 The Thumb Concept ...........................................................................................................19
3.3 Thumb’s Advantages ..........................................................................................................19
3.4 Operating Modes................................................................................................................22
3.5 Register Sets......................................................................................................................23
3.6 Low Power ARM7TDMI Sleep Mode.................................................................................... 24
4 BOOT ROM.....................................................................................................................27
4.1 Functional Description.........................................................................................................27
4.2 UART Download Data Protocol ...........................................................................................28
5 The BµILD BUS ..............................................................................................................31
5.1 Bus Masters .......................................................................................................................31
5.2 Bus Slaves .........................................................................................................................31
5.3 Bus Signals ........................................................................................................................32
6BµILD SERIAL INPUT OUTPUT (BSIO) INTERFACE.....................................................33
6.1 Overview............................................................................................................................ 33
6.2 Operational Description.......................................................................................................34
6.3 BSIO Frequency Divider......................................................................................................39
6.4 BSIO Slave Select Logic.....................................................................................................40
6.5 BSIO Interrupt Control......................................................................................................... 41
6.6 BSIO Write Buffer and Control Register............................................................................... 41
6.7 BSIO Read Buffer...............................................................................................................42
6.8 BSIO Sequencer.................................................................................................................42
6.9 BSIO Registers...................................................................................................................44
7 12-CHANNEL CORRELATOR (CORR) ...........................................................................49
7.1 Introduction ........................................................................................................................49
7.2 Tracking Modules ...............................................................................................................52
7.3 Software Requirements.......................................................................................................55
7.4 Controlling the 12 Channel Correlator..................................................................................59
7.5 12 Channel Correlator Interface Timing ............................................................................... 63
7.6 12-Channel Correlator Register Maps..................................................................................64
8 DMA CONTROLLER (DMAC) .........................................................................................91
8.1 Single-Addressed (Fly-by) Data transfers.............................................................................91
8.2 Dual-Addressed (Buffered) Data Transfers ..........................................................................97