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1: Introduction
6 GP4020 GPS Baseband Processor Design Manual
Since the internal SRAM is high-speed, it can be accessed with Zero wait-states through the Memory Peripheral
Controller. Refer to section 11 "MEMORY PERIPHERAL CONTROLLER (MPC)" on page 109, for more
information.
1.3.14 Real Time Clock (RTC)
The GP4020 Real Time Clock uses an external 32kHz crystal to give an indication of time to the GP4020 chip,
when the device is in Reset / Power Down. If a backup battery is included in a GPS receiver using the GP4020, the
RTC will continue to operate regardless of the reset-state of the rest of the device.
The RTC is incremental, which means that the number of seconds from a reset point is accumulated. The Real
Time Clock does NOT in itself contain a record of Gregorian Date, and so is NOT be affected by Year 2000
compliance issues.
Details can be found in section 13 "REAL TIME CLOCK (RTC)" on page 131.
1.3.15 System Clock Generator (SCG)
The GP4020 System Clock Generator is used to provide 2 system clocks:
• The M_CLK for the 12-channel Correlator; this is derived from the CLK_T and CLK_I inputs from the RF Front-
end device and MUST be 40MHz. This clock is fundamental to the correlator function, and must be phase-
locked to the RF Front-end
• The B_CLK for ALL components on the BµILD Bus; this can be derived from M_CLK (see above) in
conjunction with a PLL and a divider to generate a wide range of clock frequencies. In this way, the B_CLK can
be phase-locked to the RF Front-end. The clock can also be derived from an independent Crystal source.
Details can be found in section 14 "SYSTEM CLOCK GENERATOR (SCG)" on page 135.
1.3.16 System Services Module (SSM)
The System Services Module (SSM) ensures correct bus operation through a number of modes (reset, initialisation,
debug, etc.). It provides diagnostic broadcast of address and data for internal transfers along with information about
the current operating mode.
Additionally the SSM System Configuration Register controls the operating mode of the GP4020.
Specifically the System Services Module performs the following functions:
• Control the BµILD bus operational mode
• Arbitrate amongst competing resources for BµILD bus mastership
• Interface to external bus masters and manufacturing testers
• Respond to power-down requests from the Power Control logic within the Core Peripheral Control Logic block.
• Control the activities of all BµILD bus modules during system debug activity.
• Broadcast information about BµILD bus activity for external diagnostics
• Hold BµILD bus logic levels when no other bus-master is driving
• Register System Configuration data.