Filter
Top Products
Chapter 5 Command Reference
Operating Status
Operating and Programming Guide 5-57
Monitoring Status/Alarm Conditions ___________
(continued)
!
Reading and Qualifying Alarms (continued)
The setting of the Alarm Enable Register (Figure 5-2) selects which summary
status from the Alarm Condition Register is enabled to generate an alarm.
Expanded Syntax
*SRE <bit mask>
Semantics
The <bit mask> has a range of 0 to 255.
The <bit mask> value represents the sum of the binary-weighted values of the
register. Attempts to set unused bits in the register are ignored—the value of
unused bits is zero.
This query identifies the status conditions enabled to generate an alarm.
Reading the Alarm Enable Register identifies which summary status from the
Alarm Condition Register is enabled to generate an alarm.
Response
The range is 0 to 255.
The response value represents the sum of the binary-weighted values of the
register. The value of unused bits is zero.
Theory
Reading/Querying the Alarm Enable Register does not change its contents.
*SRE . . .
:SYSTem:PRESet
Sets the Alarm Enable Register.
136
NON-VOLATILE
*SRE?
RESPONSE FORMAT
Identifies the status conditions enabled to generate an alarm.
±
dd