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ATCA-C110/1G Installation and Use Manual
Chapter 4 Functional Description
48
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Power-on Sequence
The power-on sequence is controlled by the CPLD onboard the ATCA-C110/1G. The Enable
signals from the CPLD enables the corresponding regulator and the Power Good signals from
the regulator indicates the stabilization of the corresponding power supply. Refer to Power
Supplies on page 50 for more details.
Reset Architecture
The reset sources are explained in Reset Sources on page 26. The CPLD is the heart of the
Reset architecture, which implements the logic required for the same.
Boot ROM Selection
The redirection of the Boot Flash access to the Recovery Flash is through the CPLD. This
redirection of boot access is controlled by the IPMI. The CPU must, by default, boot from the
Primary Boot Flash. If the boot from Primary Boot Flash fails, the IPMC with the CPLD redirects
the access to the Secondary Boot Flash. See Figure 4-2 on page 41 for representation of the
Primary and Secondary Boot Flash connections.
PCI Interface
The PCI interface is used for communication between the CPU and the PCI express devices.
The PCI interface uses a 64-bit multiplexed data/address bus with a frequency of 66 MHz, plus
various control and error signals. The devices on the PCI interface are the MPC8540 and the
PCI-to-PCI-Express Bridge. Refer to PCI/PCI-X Interface on page 40 for details about the
Processor PCI interface.
PCI-to-PCI-Express Bridge
The PCI-to-PCI-Express Bridge acts as the interface between the FIM (through its PCI-Express
interface) and the Processor.
There are several specific data transfer modes which the PCI-to-PCI-Express Bridge supports
as it transfers data between PCI and PCI-Express: forward and reverse bridging (via pin
strapping option) as well as transparent and non-transparent bridging.
Note The ATCA-C110/1G uses the PCI-to-PCI-Express Bridge in the transparent mode as a
reverse bridge.
PCI-Express Interface
PCI-Express is a serial point-to-point high-speed interface with a LVDS interconnects. It
supports full duplex configuration with independent TX and RX lines. The PCI-Express interface
of the Processor functions both as a master (initiator) and a target device.
ATCA-C110/1G uses x4 links with an effective bandwidth of 8 Gbps or 1 GBps in each direction;
the effective data bandwidth of the PCI-Express links on ATCA-C110/1G is 2 GBps.