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Chapter 5 Command Reference
Operating Status
5-62 Operating and Programming Guide
Monitoring Status/Alarm Conditions ___________
(continued)
!
Reading and Qualifying Receiver Status (continued)
The setting of an enable register (figures 5-3 and 5-1) selects which events from
the corresponding event register are enabled to report to the corresponding
summary bit of the summarizing condition register.
Expanded Syntax
:STATus:OPERation:ENABle <bit mask>
:STATus:QUEStionable:ENABle <bit mask>
:STATus:OPERation:HARDware:ENABle <bit mask>
:STATus:OPERation:HOLDover:ENABle <bit mask>
:STATus:OPERation:POWerup:ENABle <bit mask>
Parameter
The <bit mask> has a range of 0 to 65535.
The <bit mask> value represents the sum of the binary-weighted values of the
register. Attempts to set unused bits in an enable register are ignored—the
value of unused bits is zero.
:STATus:<register>:ENABle . . .
:SYSTem:PRESet
Sets the specified enable register.
See Figure 5-1 for Default
Event Enable identification
NON-VOLATILE