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APPENDICES
A
Appendix 4 Special Register (SD) for MELSECNET/H (MELSECNET/10 Mode) Remote I/O Station
No. Name Meaning Explanation
Set by
(When Set)
Corres-
ponding
ACPU
D9
Corres-
ponding
CPU
SD16
Error
individual
information
Error individual
information
• This register stores individual information corresponding to the error
code stored in SD0.
• The following six types of information are stored here.
• The error individual information type can be determined by
"individual information category code" stored in SD4. (Values stored
in "individual information category code" correspond to the following
1) to 7).)
1) (Empty)
2) File name/drive name
3) Time (value actually measured)
4) Program error location
*1 For extension names, refer to *6.
*2 The description of the bit pattern is as follows:
S
(Error)
New
Rem
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
Number
SD16
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
Drive
B15toB8 to
Description
File name
(ASCII code: 8 characters)
Extension
*1
(ASCII code: 3 characters)
2E
H(.)
(Empty)
(Example)
File name =
ABCDEFGH.IJK
B7 B0
42H(B)
44
H(D)
46
H(F)
48
H(H)
49
H(I)
4B
H(K)
41
H(A)
43
H(C)
45
H(E)
47
H(G)
2E
H(.)
4A
H(J)
No. Description
SD16 Time: 1µs units (0 to 999µs)
SD17 Time: 1ms units (0 to 65535ms)
SD18
(Empty)
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
No. Description
SD16
File name
(ASCII code: 8 characters)
SD17
SD18
SD19
SD20
Extension
*1
2E
H
(.)
SD21 (ASCII code: 3 characters)
SD22
Pattern
*2
SD23 Block No.
SD24 Step No./transition No.
SD25
Sequence step No. (L)
Sequence step No. (H)
SD26
SFC block specified (1)/
not specified (0)
0000
to
0123415 14 to
SFC step specified (1)
/not specified (0)
SFC transition specified (1)/
not specified (0)
(Not used)
(Bit number)