BBus slave and DMA interface
678
NS9750 Hardware Reference
9040 0008 FIFO Status FIFO Status register
9040 000C FwdCmdFifoReadReg Forward Command FIFO Read register
9040 0010 FwDatFifoReadReg Forward Data FIFO Read register
9040 0014 – 9040 0018 Reserved
9040 001C RvFifoWriteReg Reverse FIFO Write register
9040 0020 RvFifoWriteReg - Last Reverse FIFO Write Register - Last
9040 0024 FwdCmdDmaControl Forward Command DMA Control register
9040 0028 FwDatDmaControl Forward Data DMA Control register
9040 0100 – 9040 017C CSRs (8-bit wide)
9040 0100 pd Printer Data Pins register
9040 0104 psr Port Status register (host)
9040 0108 pcr Port Control register
9040 010C pin Port Status register (peripheral)
9040 0110 Reserved
9040 0114 fea Feature Control Register A
9040 0118 feb Feature Control Register B
9040 011C fei Interrupt Enable register
9040 0120 fem Master Enable register
9040 0124 exr Extensibility Byte Requested by Host — UART and
SPI
9040 0128 ecr Extended Control register
9040 012C sti Interrupt Status register
9040 0130 Reserved
9040 0134 msk Pin Interrupt Mask register
9040 0138 pit Pin Interrupt Control register
9040 013C – 9040 0164 Reserved
9040 0168 grn Granularity Count register
Address Register Description
Table 390: 1284 Control and Status registers
