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3.4.2 Pin Header Connector JP2
JP2 16-Pin Heade
r
16-Pin Golden Finger
RF
SRAM
Flash
Antenna Connector
Pin1 Pin 1
Pin header parallel golden finger
Figure 3
Pin Function Input/Output Level Pin Function Input/Output Level
1 PIO1 In/Out LVTTL 2 PIO10 In/Out LVTTL
3 PIO11 In/Out LVTTL 4 TXD0 Output LVTTL
5 RXD0 Input LVTTL 6 PWR_IN Input 3.3V
7 GND Ground 0V 8 LED0 In/Out LVTTL
9 1PPS Output LVTTL 10 TXD1 Output LVTTL
11 RXD1 Input LVTTL 12 VBAT Input 3.3V
13 ANT PWR Input 14 PIO12 In/Out LVTTL
15 PIO13 In/Out LVTTL 16 PIO14 In/Out LVTTL
The following is a functional description of the pins on the 16-pin interface connector.
Pin 1. PIO1: Reserved I/O port 1 from CPU
Pin 2. PIO10: Reserved I/O port 10 from CPU
Pin 3. PIO11: Reserved I/O port 11 from CPU
Pin 4. TXD0: Serial port output # 1 (GPS navigation output)
Pin 5. RXD0: Serial port input # 1 (command input)
Pin 6. PWR_IN: Power supply input, regulated 3.3V, 112mA
Pin 7. GND: Ground
Pin 8. LED0: Reserved I/O port 31 from CPU
Pin 9. 1PPS: 1-pulse-per-second output. Active high for approx. 1usec
Pin 10. TXD1: Serial port output #2 (currently unused)
Pin 11. RXD1: Serial port input #2 (DGPS input)
Pin 12. VBAT: External backup battery charging input
Pin 13. ANT PWR: External active antenna power input
Pin 14. PIO12: Either Reserved I/O port
12
from CPU or INT5
Pin 15. PIO13: Either Reserved I/O port
13
from CPU or INT6
Pin 16. PIO14: Reserved I/O port
14
from CPU