Section 12 Compare Match Timer
R01UH0134EJ0400 Rev. 4.00 Page 651 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
12.2.1 Compare Match Timer Start Register (CMSTR)
CMSTR is a 16-bit register that selects whether compare match counter (CMCNT) operates or is
stopped.
Bit:
Initial value:
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
RRRRRRRRRRRRRRR/WR/W
---- ---- ------STR1 STR0
Bit Bit Name
Initial
Value R/W Description
15 to 2 All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
1 STR1 0 R/W Count Start 1
Specifies whether compare match counter_1 operates
or is stopped.
0: Counting by CMCNT_1 is stopped
1: Counting by CMCNT_1 is started
0 STR0 0 R/W Count Start 0
Specifies whether compare match counter_0 operates
or is stopped.
0: Counting by CMCNT_0 is stopped
1: Counting by CMCNT_0 is started
