Garmin 155 GPS Receiver User Manual


 
The block diagram in Figure 2 shows the interaction between components on the Control/Display Unit.
Figure 2
Control/Display Unit Block Diagram
1.2.2 Main Board Assembly
The Main Board Assembly contains the CPU, operating system ROM, system memory, discrete I/O, ser-
ial communication drivers/receivers and the power supply. These items are discussed in further detail
below.
1.2.2.1 Central Processing Unit (CPU)
The Main Board is a microprocessor-based computer board. This board contains an Intel 80L186EB
microprocessor running at 16 MHz, a plug-in read only memory chip (ROM) and random access mem-
ory chips (RAM). Data stored in RAM is maintained by a 3 volt lithium battery when the unit is
switched off, and by the regulated 5 volt supply when the unit is powered on. A custom LSI is used to
decode the signals from the GPS satellites. A real time clock IC is used to keep track of the date and
time. Other circuits on the board are used for input/output functions such as controlling the display,
reading the keypad, and controlling the receiver. Discrete input/output lines are provided for CDI
course deviation, CDI to/from flag, CDI NAV flag, Super Flag, external annunciators, OBS course, and
to activate the Approach mode. Serial communication lines for OBI (clock/data/sync), ARINC 429, RS-
422 and RS-232 (two channels) are also included.
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