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Matrix Modules Command Reference 69Chapter 4
Figure 4-1. E1465A/E1466A/E1467A Status System Register Diagram
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
+
STATus:OPERation:CONDition?
STATus:OPERation:EVENt?
STATus:OPERation:ENABle
+
"OR"
CEV EN
3
4
5
6
7
2
1
0
+
Command Error
Execution Error
Device Dependent Error
Query Error
Operation Complete
EV EN
Status
Byte
Summary Bit
Output Queue
Standard Event Status Register
*SRE <unmask>
*SRE?
*STB?
Status Byte Register
OPERation Status Register
QUE = Questionable Data
NOTE:
MAV = Message Available
ESB = Standard Event
RQS = Request Service
C = Condition Register
EV = Event Register
EN = Enable Register
<32768>
<16384>
<8192>
<4096>
<2048>
<1024>
<512>
<256>
<128>
<64>
<32>
<16>
<8>
<4>
<2>
<1>
<128>
<64>
<32>
<16>
<8>
<4>
<2>
<1>
<2>
<128>
<4>
<8>
<16>
<32>
<1>
RQS
ESB
MAV
1
7
6
3
5
4
2
0
unmask examples:
*ESE 61 unmasks standard event register bits 0,
2, 3, 4 and 5 (*ESE 128 only unmasks bit 7).
*SRE 128 unmasks the OPR bit (operation) in
the status byte register. This is effective
only if the STAT:OPER:ENAB 256 command
is executed.
STAT:QUES:ENAB 256 unmasks the "Scan Complete"
Operation Complete <128>7
Register
bit
unmask
decimal
weight
+
"OR"
ESB
SRQ
SRQ
SRQ
SRQ = Interface Bus
Service Request
Other
Instrument
Other
Instrument
SRQ Line
Interface Bus
System
Controller
SPOLL
*ESE?
*ESE <unmask>
*ESR?
EN
Scan Complete
OPR
Summary
Bit
OPR = Operation Status
User Request
Request Control
"OR"
"OR"
Automatically Set at
Power On Conditions
Automatically Set by
Parser
Power On
Related Commands
Set by *OPC
are *OPC? and *WAI
Summary
Bit
bit.
STATus:PRESet
STATus:OPERation:ENABle?